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Microchip Technology /ATSAML22J18A /SUPC /VREG

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Interpret as VREG

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https://regviz.com/r/Microchip Technology/ATSAML22J18A/SUPC/VREG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (LDO)SEL0 (STDBYPL0)STDBYPL0 0 (RUNSTDBY)RUNSTDBY 0 (LPEFF)LPEFF 0VSVSTEP0VSPER

SEL=LDO

Description

VREG Control

Fields

ENABLE

Enable
SEL

Voltage Regulator Selection in active mode

0 (LDO): LDO selection

1 (BUCK): Buck selection

2 (SCVREG): Switched Cap selection
STDBYPL0

Standby in PL0
RUNSTDBY

Run during Standby
LPEFF

Low Power efficiency
VSVSTEP

Voltage Scaling Voltage Step
VSPER

Voltage Scaling Period

Links

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data